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Semiconductor Electronics

JEE Main 2024 (Online) 31st January Evening ShiftMCQMedium📈 Topic in 53% papers+4−1
Ques. 1JEE Main 2024, 31 January (Evening Shift)

[figure] The output of the given circuit diagram is -

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]

Answer

(4) [figure]

Solution

Upper OR gate gets A and B; lower OR gate gets B and A; both feed the NOR gate.

Y= (A+ B)+( A+B)= (A+ A)+(B+ B)= 1=0

[figure]

at least one NOR input is always 1, Y = 0 for every input.

Answer: (4)

Keep practising — Semiconductor Electronics

Ques. 2JEE Main 2024, 30 January (Morning Shift)

A Zener diode of breakdown voltage 10 V is used as a voltage regulator as shown in the figure. The current through the Zener diode is : [figure]

  1. 0
  2. 30 mA
  3. 20 mA
  4. 50 mA
Ques. 3JEE Main 2024, 30 January (Evening Shift)

[figure] In the given circuit, the voltage across load resistance (RL) is :

  1. 8.75 V
  2. 9.00 V
  3. 8.50 V
  4. 14.00 V
Ques. 4JEE Main 2024, 29 January (Morning Shift)

In the given circuit, the breakdown voltage of the Zener diode is 3.0 V. What is the value of Iz ? [figure]

  1. 3.3 mA
  2. 10 mA
  3. 5.5 mA
  4. 7 mA
Ques. 5JEE Main 2024, 29 January (Evening Shift)

The truth table for this given circuit is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 6JEE Main 2024, 27 January (Morning Shift)

Which of the following circuits is reverse - biased?

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 7JEE Main 2024, 27 January (Evening Shift)

The truth table of the given circuit diagram is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]

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