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Semiconductor Electronics · Question 10

JEE Main 2026 (Online) 2nd April Morning ShiftMCQHard📈 Topic in 23% papers+4−1
1

For the given circuit (shown in part (A)) the time dependent input voltage vin(t) and corresponding output vo(t) are shown in part (B) and part (C), respectively. Identify the components that are used in the circuit between points X and Y. [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]

Answer

(2) [figure]

Solution

Given branch (ideal diode + Zener, VZ=5 V):

⇒ When X is positive, the ideal diode is forward biased and the Zener is reverse biased.

⇒ It conducts once vin>5 V, so vo is held at +5 V (positive half clipped).

⇒ When X is negative, the ideal diode is reverse biased, so this branch is open.

The output is also held at -5 V in the negative half, so the X–Y branch must:

(i) stay open when X is positive, and

(ii) conduct from Y to X with a fixed 5 V drop once VY-VX>5 V.

Option (2): diode with cathode towards X, Zener with cathode towards Y.

⇒ X positive: the diode is reverse biased ⇒ branch open

⇒ Y positive: the diode is forward biased (0 V) and the Zener is reverse biased; it breaks down at 5 V ⇒ vo=-5 V

A resistor (options 1, 3) cannot hold the voltage constant, and in option (4) the Zener conducts forward at 0 V, so vo would be 0 V instead of -5 V.

Answer: (2)

JEE Main 2026 (Online) 2nd April Morning Shift

Keep practising — Semiconductor Electronics

2

If X and Y are the inputs, the given circuit works as . [figure]

  1. OR gate
  2. AND gate
  3. NAND gate
  4. NOR gate
JEE Main 2026 (Online) 2nd April Evening Shift
3

Assuming in forward bias condition there is a voltage drop of 0.7 V across a silicon diode, the current through diode D1 in the circuit is mA. (Assume all diodes in the given circuit are identical) [figure]

  1. 17.6
  2. 18.8
  3. 20.15
  4. 11.7
JEE Main 2026 (Online) 28th January Morning Shift
4

Two p-n junction diodes D1 and D2 are connected as shown in figure. A and B are input signals and C is the output. The given circuit will function as a . [figure]

  1. AND Gate
  2. OR Gate
  3. NOR Gate
  4. NAND Gate
JEE Main 2026 (Online) 28th January Evening Shift
5

A voltage regulating circuit consisting of Zener diode, having breakdown voltage of 10 V and maximum power dissipation of 0.4 W, is operated at 15 V. The approximate value of protective resistance in this circuit is .

JEE Main 2026 (Online) 24th January Morning Shift
6

Identify the correct truth table of the given logic circuit. [figure]

  1. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  2. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  3. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  4. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
JEE Main 2026 (Online) 24th January Evening Shift
7

The following diagram shows a Zener diode as a voltage regulator. The Zener diode is rated at Vz = 5 V and the desired current in load is 5 mA. The unregulated voltage source can supply up to 25 V. Considering the Zener diode can withstand four times the load current, the value of resistor Rs (shown in circuit) should be . [figure]

  1. 100
  2. 10
  3. 1000
  4. 4000
JEE Main 2026 (Online) 23rd January Morning Shift
8

For the given logic gate circuit, which of the following is the correct truth table? [figure]

  1. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 array
  2. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 0 & 0 array
  3. arrayccc n & m & z \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 1 array
  4. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 0 \ 1 & 0 & 0 array
JEE Main 2026 (Online) 23rd January Evening Shift
9

Find the correct combination of A, B, C and D inputs which can cause the LED to glow. [figure]

  1. 1000
  2. 0011
  3. 0100
  4. 1101
JEE Main 2026 (Online) 22nd January Morning Shift
10

The correct truth table for the given input data of the following logic gate is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
JEE Main 2026 (Online) 22nd January Evening Shift
11

The given circuit works as : [figure]

  1. NOR gate
  2. OR gate
  3. AND gate
  4. NAND gate
JEE Main 2026 (Online) 21st January Morning Shift

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