For the given logic gate circuit, which of the following is the correct truth table? [figure]
- arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 array
- arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 0 & 0 array
- arrayccc n & m & z \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 1 array
- arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 0 \ 1 & 0 & 0 array
Answer
(1) arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 array
Solution
Output of the OR gate: n + m
The NAND gate gets n and n + m:
z = n (n + m) = n n + n m = n + n m = n ( n + n m = n)
z = 1 when n = 0 and z = 0 when n = 1, whatever m is:
(0, 0) → 1, (0, 1) → 1, (1, 1) → 0, (1, 0) → 0
Answer: (1)